Publication

Archived

L. Zhang, Z. Zheng*, W. Song, T. Chen, S. Feng, J. Chen, M. Hua, and K. J. Chen*, “Gate Leakage and Reliability of GaN p-Channel FET with SiN_x/GaON Staggered Gate Stack,” IEEE Electron Device Lett., 43(11), 1822, 2022. (editor's pick)
Z. Zheng*, L. Zhang, W. Song, S. Feng, H. Xu, J. Sun, S. Yang, T. Chen, J. Wei, and K. J. Chen*, “Gallium nitride-based complementary logic integrated circuits,” Nature Electronics, 4(8), 595, 2021.
L. Zhang, Z. Zheng*, Y. Cheng, Y. H. Ng, S. Feng, W. Song, T. Chen, and K. J. Chen*, “SiN/in-situ-GaON Staggered Gate Stack on p-GaN for Enhanced Stability in Buried-Channel GaN p-FETs,” in 2021 IEEE International Electron Device Meeting (IEDM).
Z. Zheng, H. Xu, L. Zhang, and K. J. Chen*, “On the operating speed and energy efficiency of GaN-based monolithic complementary logic circuits for integrated power conversion systems,” Fundamental Research, 1(6), 661, 2021. (invited)
Z. Zheng, W. Song, L. Zhang, S. Yang, J. Wei, and K. J. Chen*, “Monolithically Integrated GaN Ring Oscillator Based on High-Performance Complementary Logic Inverters,” IEEE Electron Device Lett., 42(1), 26, 2021. (editor's pick)
Z. Zheng, W. Song, L. Zhang, S. Yang, J. Wei*, and K. J. Chen*, “High I_ON and I_ON/I_OFF Ratio Enhancement-Mode Buried p-Channel GaN MOSFETs on p-GaN Gate Power HEMT Platform,” IEEE Electron Device Lett., 41(1), 26, 2020.

S. Feng*, Z. Zheng*, Y. Wang, G. Lyu, K. Liu, Y. Cheng, J. Chen, T. Chen, L. Zhang, W. Song, H. Liao, Y. H. Ng, M. Hua, K. Cheng, J. Wei, and K. J. Chen*, “HyFET—A GaN/SiC Hybrid Field-Effect Transistor,” in 2023 IEEE International Electron Device Meeting (IEDM).
S. Feng, Z. Zheng*, Y. Cheng, Y. H. Ng, W. Song, T. Chen, L. Zhang, K. Liu, K. Cheng, and K. J. Chen*, “Strain release in GaN epitaxy on 4° off-axis 4H-SiC,” Advanced Materials, 34(23), 2201169, 2022.

H. Xu, Z. Zheng*, L. Zhang, J. Sun, S. Yang, J. He, J. Wei, and K. J. Chen*, “Dynamic Interplays of Gate Junctions in Schottky-type p-GaN Gate Power HEMTs during Switching Operation,” in 2022 IEEE 34^th International Symposium on Power Semiconductor Devices and ICs (ISPSD).
L. Zhang, Z. Zheng, S. Yang, W. Song, J. He, and K. J. Chen*, “p-GaN Gate HEMT With Surface Reinforcement for Enhanced Gate Reliability,” IEEE Electron Device Lett., 42(1), 22, 2021.

G. Lyu, J. Wei*, W. Song, Z. Zheng, L. Zhang, J. Zhang, Y. Cheng, S. Feng, Y. H. Ng, T. Chen, K. Zhong, J. Liu, R. Zeng, and K. J. Chen*, “A GaN Power Integration Platform Based on Engineered Bulk Si Substrate with Eliminated Crosstalk between High-Side and Low-Side HEMTs,” in 2021 IEEE International Electron Devices Meeting (IEDM).
H. Xu, G. Tang, J. Wei, Z. Zheng, and K. J. Chen*, “Monolithic Integration of Gate Driver and Protection Modules With P-GaN Gate Power HEMTs,” IEEE Trans. Ind. Electron., 69(7), 6784, 2022.
K. J. Chen*, J. Wei, G. Tang, H. Xu, Z. Zheng, L. Zhang, and W. Song, “Planar GaN Power Integration – The World is Flat,” in 2020 IEEE International Electron Devices Meeting (IEDM). (invited)

Y. Cheng, Y. H. Ng, Z. Zheng, and K. J. Chen, “RF Enhancement-Mode p-GaN Gate HEMT on 200mm-Si Substrates,” IEEE Electron Device Lett., 44(1), 29, 2023.
W. Song, Z. Zheng, T. Chen, J. Wei, L. Yuan, and K. J. Chen*, “RF Linearity Enhancement of GaN-on-Si HEMTs with a Closely Coupled Double-Channel Structure,” IEEE Electron Device Lett., 42(8), 1116, 2021.
Z. Zheng, W. Song, J. Lei, Q. Qian, J. Wei, M. Hua, S. Yang, L. Zhang, and K. J. Chen*, “GaN HEMT With Convergent Channel for Low Intrinsic Knee Voltage,” IEEE Electron Device Lett., 41(9), 1304, 2020.

S. Yang, Z. Zheng, L. Zhang, W. Song, and K. J. Chen*, “GaN MIS-HEMTs With Surface Reinforcement for Suppressed Hot-Electron-Induced Degradation,” IEEE Electron Device Lett., 42(4), 489, 2021.
J. Sun, Z. Zheng, K. Zhong, G. Lyu, and K. J. Chen*, “Impact of Drain Leakage Current on Short Circuit Behavior of GaN/SiC Cascode Devices,” IEEE Trans. Power Electron., 36(11), 12158, 2021.

T. Chen, Z. Zheng*, S. Feng, L. Zhang, W. Song, and K. J. Chen*, “GaN Non-Volatile Memory Based on Junction Barrier-Controlled Bipolar Charge Trapping,” IEEE Electron Device Lett., 43(5), 697, 2022.
L. Zhang, J. Wei, Z. Zheng, W. Song, S. Yang, H. Xu, and K. J. Chen*, “p-GaN Gate Power Transistor With Distributed Built-in Schottky Barrier Diode for Low-loss Reverse Conduction,” IEEE Electron Device Lett., 41(3), 314, 2020.
M. Hua*, J. Chen, C. Wang, L. Liu, L. Li, J. Zhao, Z. Jiang, J. Wei, L. Zhang, Z. Zheng, and K. J. Chen, “E-mode p-GaN Gate HEMT with p-FET Bridge for Higher V_TH and Enhanced V_TH Stability,” in 2020 IEEE International Electron Devices Meeting (IEDM).

Note: corresponding authors*, authors with equal contribution
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