Journal paper in 2020

  1. Y. Wang, G. Lyu, J. Wei, Z. Zheng, J. He, J. Lei, and K. J. Chen, “Characterization of Static and Dynamic Behavior of 1200 V Normally off GaN/SiC Cascode Devices,” IEEE Trans. Ind. Electron., vol. 67, no. 12, pp. 10284–10294, Dec. 2020, doi: 10.1109/TIE.2019.2959512.

  2. M. Zhang, B. Li*, Z. Zheng, X. Tang, and J. Wei, “A New SiC Planar-Gate IGBT for Injection Enhancement Effect and Low Oxide Field,” Energies, vol. 14, no. 1, p. 82, Dec. 2020, doi: 10.3390/en14010082.

  3. Z. Zheng, W. Song, J. Lei, Q. Qian, J. Wei, M. Hua, S. Yang, L. Zhang, and K. J. Chen*, “GaN HEMT With Convergent Channel for Low Intrinsic Knee Voltage,” IEEE Electron Device Lett., vol. 41, no. 9, pp. 1304–1307, Sep. 2020, doi: 10.1109/LED.2020.3010810.

  4. G. Lyu, Y. Wang, J. Wei, Z. Zheng, J. Sun, L. Zhang, and K. J. Chen*, “A Normally-OFF Copackaged SiC-JFET/GaN-HEMT Cascode Device for High-Voltage and High-Frequency Applications,” IEEE Trans. Power Electron., vol. 35, no. 9, pp. 9671–9681, Sep. 2020, doi: 10.1109/TPEL.2020.2971789.

  5. J. He, J. Wei, Y. Li, Z. Zheng, S. Yang, B. Huang, and K. J. Chen*, “Characterization and analysis of low-temperature time-to-failure behavior in forward-biased Schottky-type p-GaN gate HEMTs,” Appl. Phys. Lett., vol. 116, no. 22, p. 223502, Jun. 2020, doi: 10.1063/5.0007763.

  6. S. Yang, S. Huang, J. Wei, Z. Zheng, Y. Wang, J. He, and K. J. Chen*, “Identification of trap states in p-GaN layer of a p-GaN/AlGaN/GaN power HEMT structure by deep-level transient spectroscopy,” IEEE Electron Device Lett., vol. 41, no. 5, pp. 685–688, May 2020, doi: 10.1109/LED.2020.2980150.

  7. C. Wang, M. Hua*, J. Chen, S. Yang, Z. Zheng, J. Wei, L. Zhang, and K. J. Chen, “E-Mode p-n Junction/AlGaN/GaN (PNJ) HEMTs,” IEEE Electron Device Lett., vol. 41, no. 4, pp. 545–548, Apr. 2020, doi: 10.1109/LED.2020.2977143.

  8. L. Zhang, J. Wei, Z. Zheng, W. Song, S. Yang, H. Xu, and K. J. Chen*, “p-GaN Gate Power Transistor With Distributed Built-in Schottky Barrier Diode for Low-loss Reverse Conduction,” IEEE Electron Device Lett., vol. 41, no. 3, pp. 341–344, Mar. 2020, doi: 10.1109/LED.2020.2968735.

  9. M. Hua*, S. Yang, J. Wei, Z. Zheng, J. He, and K. J. Chen, “Hole-Induced Degradation in E-Mode GaN MIS-FETs: Impact of Substrate Terminations,” IEEE Trans. Electron Devices, vol. 67, no. 1, pp. 217–223, Jan. 2020, doi: 10.1109/TED.2019.2954282.

  10. Z. Zheng, W. Song, L. Zhang, S. Yang, J. Wei*, and K. J. Chen*, “High ION and ION/IOFF Ratio Enhancement-Mode Buried p-Channel GaN MOSFETs on p-GaN Gate Power HEMT Platform,” IEEE Electron Device Lett., vol. 41, no. 1, pp. 26–29, Jan. 2020, doi: 10.1109/LED.2019.2954035.


Note:   corresponding authors*,   authors with equal contribution
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